2024-01-01 14:56:11 +01:00
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.include "ps2_keyboard.h65"
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.include "string.h65"
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.include "lcd.h65"
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.include "parity.h65"
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2024-01-07 00:42:05 +01:00
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Export ps2kb, init, begin_receive, scancode, status, scancode_handler
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2024-01-02 23:37:07 +01:00
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Export ps2kb, _receive_irq_shift_reg_handler, _receive_irq_timer_handler, _send_byte, _send_irq_shift_reg_handler, _send_irq_timer_handler,
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2024-01-07 00:42:05 +01:00
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Export ps2kb, send_command, send_cmd, send_data, cmd_response, response_length, FMT_CMD_FAIL
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2024-01-01 14:56:11 +01:00
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.bss
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2024-08-08 20:15:50 +02:00
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status: .res 1 ;; current status
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prev_status: .res 1 ;; status before sending command
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send_last_bits: .res 1 ;; last bits to load after 8 bits were shifted out
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send_cmd: .res 1 ;; command to send/last sent
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send_data: .res 1 ;; data byte to send/last sent or NO_DATA
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expect_data_length: .res 1 ;; number of data bytes to expect from keyboard
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response_length: .res 1 ;; number of response bytes from keyboard
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cmd_response: .res 3 ;; responses from keyboard
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key_read: .res 2 ;; first 8 bits, last 3 bits from scancode
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scancode: .res 1 ;; last received scancode
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scancode_handler: .res 2 ;; pointer to a function that handles new scancodes
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2024-01-01 14:56:11 +01:00
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.code
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2024-08-08 20:15:50 +02:00
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; spi-transferred code will be placed here
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; these are macros and not subroutines to save time during the interrupt handler (no jsr, rts)
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2024-01-01 14:56:11 +01:00
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;;********************************************************************************
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;; @macro Enable the clock signal from the keyboard
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;; @modifies A
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;; @details
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;; Stop pulling the keyboards clock low
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;;********************************************************************************
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.macro _EnableClock
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; set pin to input
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lda ps2kb::VIA + ps2kb::PULL_DDR
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and #<~ps2kb::PULL_MASK_CLK
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sta ps2kb::VIA + ps2kb::PULL_DDR
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.endmacro
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;;********************************************************************************
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;; @macro Disable the clock signal from the keyboard
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;; @modifies A
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;; @details
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;; Pulls the keyboards clock low
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;;********************************************************************************
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.macro _DisableClock
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; set pin to output
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lda ps2kb::VIA + ps2kb::PULL_DDR
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ora #ps2kb::PULL_MASK_CLK
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sta ps2kb::VIA + ps2kb::PULL_DDR
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; set pin low
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lda ps2kb::VIA + ps2kb::PULL_REG
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and #<~ps2kb::PULL_MASK_CLK
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sta ps2kb::VIA + ps2kb::PULL_REG
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.endmacro
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;;********************************************************************************
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;; @macro Stop pulling the keyboard data pin low
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;; @modifies A
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;;********************************************************************************
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.macro _StopPullDataLow
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; set pin to input
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lda ps2kb::VIA + ps2kb::PULL_DDR
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and #<~ps2kb::PULL_MASK_DAT
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sta ps2kb::VIA + ps2kb::PULL_DDR
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.endmacro
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;;********************************************************************************
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;; @macro Pull the keyboard data pin low
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;; @modifies A
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;;********************************************************************************
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.macro _PullDataLow
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; set pin to output
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lda ps2kb::VIA + ps2kb::PULL_DDR
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ora #ps2kb::PULL_MASK_DAT
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sta ps2kb::VIA + ps2kb::PULL_DDR
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; set pin low
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lda ps2kb::VIA + ps2kb::PULL_REG
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and #<~ps2kb::PULL_MASK_DAT
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sta ps2kb::VIA + ps2kb::PULL_REG
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.endmacro
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2024-08-08 20:15:50 +02:00
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;;********************************************************************************
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;; @function Initialize the keyboard
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;; @details
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;; - @ref _DisableClock "Disable the clock"
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;; - Initialize variables to 0
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;; - Clear the VIAs shift register and set T2 to oneshote mode
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;; - Set scancode_handler to immediately return (dont handle scancodes)
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;; @modifies A
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;;********************************************************************************
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.proc init
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_DisableClock
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stz key_read
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stz key_read+1
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stz scancode
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stz status
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; T2 oneshot mode, clear shift reg
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lda ps2kb::VIA + IO::ACR
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and #<~IO::ACR_MASK::SR
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ora #IO::ACR::T2_IRQ_LOAD
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sta ps2kb::VIA + IO::ACR
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; load this rts as scancode_handler
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StoreDByte @rts, scancode_handler
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@rts:
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rts
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.endproc
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;;********************************************************************************
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;; @function Start receiving data from the keyboard
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;; @details
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;; - use the shift register interrupts to read the first 8 bits
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;; - configure timer for timing the read of the last 3 bits
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;; @modifies A
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;;********************************************************************************
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.proc begin_receive
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; disable timer interrupts (this might be called while waiting on the last 3 bits)
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IO_DisableIRQ ps2kb::VIA, IO::IRQ::T2
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; (re)set shift register to shift in under external clock on CB1
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lda ps2kb::VIA + IO::ACR
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and #<~IO::ACR_MASK::SR
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sta ps2kb::VIA + IO::ACR ; important, disabling SR resets the count
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ora #IO::ACR::SR_SIN_PHIE
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sta ps2kb::VIA + IO::ACR
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stz key_read
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stz key_read+1
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stz scancode
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2024-01-02 23:37:07 +01:00
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; the 3 last bits take about 230us, at @1MHz => wait 230 cycles and then the shift register
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; (this could be shorter since the it takes a few cycles after the interrupt)
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lda #<ps2kb::TIMER_RECV
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sta ps2kb::VIA + IO::T2CL
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; set to RECEIVE_KEYS only if RECEIVE_ANSWER is not set
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bit status
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bvs @status_set
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lda #ps2kb::STATUS::RECEIVE_KEYS
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sta status
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@status_set:
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; todo setup irq handlers
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StoreDByte _receive_irq_shift_reg_handler, $3000
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StoreDByte _receive_irq_timer_handler, $3060
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2024-01-01 14:56:11 +01:00
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_EnableClock
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IO_EnableIRQ ps2kb::VIA, IO::IRQ::SR
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; reset and start SR
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stz ps2kb::VIA + IO::SR
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rts
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.endproc
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;;********************************************************************************
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;; @function Read the first 8 bits an
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;; @modifies A
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;; @details
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;; - read shift register
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;; - disable shift register interrupts
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;; - reset shift register
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;; - enable timer 2 interrupts
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;; - start timer 2
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;; IO::SR has to be read before the next bit is shifted in, which happens ~75us after the irq
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;; at 1MHz, handling this interrupt takes about 50us (without any additional debug code),
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;; so it should work
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;;********************************************************************************
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.proc _receive_irq_shift_reg_handler
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lda ps2kb::VIA + IO::SR
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sta key_read
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stz ps2kb::VIA + IO::SR
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IO_DisableIRQ ps2kb::VIA, IO::IRQ::SR
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IO_EnableIRQ ps2kb::VIA, IO::IRQ::T2
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; start timer, low order count already in latch after begin_receive
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lda #>ps2kb::TIMER_RECV
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sta ps2kb::VIA + IO::T2CH
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rts
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.endproc
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;;********************************************************************************
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;; @function Read the last 3 bits after after timer 2 is up
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;; @modifies A
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;; @details
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;; - read shift register
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;; - disable timer 2 interrupts
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;; - enable shift register interrupts
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;; - reset shift register
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;; - jump to the subroutine pointed to by scancode_handler
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;;********************************************************************************
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.proc _receive_irq_timer_handler
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lda ps2kb::VIA + IO::SR
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sta key_read+1
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lda ps2kb::VIA + IO::T2CL ; clear interrupt flag
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IO_DisableIRQ ps2kb::VIA, IO::IRQ::T2
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; reset SR
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; disabling shifting in acr seems necessary to reset - otherwise
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; it continues counting and interrupts after the first 5 bits of the next keypress
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lda #(IO::ACR::SR_SIN_PHIE | IO::ACR::T2_IRQ_LOAD)
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trb ps2kb::VIA + IO::ACR
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tsb ps2kb::VIA + IO::ACR
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stz ps2kb::VIA + IO::SR
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IO_EnableIRQ ps2kb::VIA, IO::IRQ::SR
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lda key_read+1
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ror ; stop bit -> C
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sta key_read+1 ; parity in bit 0, D7 in bit 1
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ror ; parity -> C
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ror ; D7 -> C
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lda key_read ; not affecting carry
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rol ; C -> bit 0, startbit -> C
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Reverse A
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sta scancode
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; check parity
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CalculateOddParity
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eor key_read+1 ; if bit 0 is 1 - parity error
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and #1 ; bit 1 is still D7
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bne @parity_error
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@handle_scancode:
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; check what to do with the scancode
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bit status
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bpl @status_not_receive_keys ; RECEIVE_KEYS
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jmp (scancode_handler)
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@status_not_receive_keys:
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bvc @status_dont_handle ; RECEIVE_ANSWER
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jmp _process_cmd_answer
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@status_dont_handle:
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rts
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@parity_error: ; TODO handle somehow
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lda #$fe ; fe means error/resend for commands
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sta scancode
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DEBUG_LED_ON 2
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bra @handle_scancode
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.endproc
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;;********************************************************************************
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;; @function Send a command to the keyboard
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2024-01-07 00:42:05 +01:00
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;; @details
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;; No checks are done on the validity of the command and data byte.
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;; You can send anything you want to the keyboard.
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;; `send_command` will return immediately, as sending the command is asynchronous.
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;; The command is done if `ps2kb::status & ps2kb::STATUS::SEND == 0`.
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;; @section Response
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;; The answers will be in the byte array ps2kb::cmd_response.
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;; If the command did not have a data byte, cmd_response is:
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;; - 0: command response
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;; - 1: NO_RESPONSE or additional response byte (identify keyboard command only)
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;; - 2: NO_RESPONSE or additional response byte (identify keyboard command only)
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;;
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;; If the command did have a data byte, cmd_response is:
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;; - 0: 0xFA (ACK) or 0xFE (Resend/Error)
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;; - 1: 0xFA (ACK) or 0xFE (Resend/Error)
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;; - 2: NO_RESPONSE or additional response byte
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;;
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;; If ANY of the bytes in cmd_response is 0xFE, the command failed.
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;;
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;; @modifies A,X,Y
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;; @param A: The command byte
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;; @param X: The data byte or NO_DATA if only the command byte should be sent
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;; @param Y: The number of data bytes expected to receive. Must be one of {0, 1, 2}
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;;********************************************************************************
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.proc send_command
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sty expect_data_length
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stx send_data
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stz response_length
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ldy #ps2kb::NO_RESPONSE
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sty cmd_response
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sty cmd_response+1
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sty cmd_response+2
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ldy status
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sty prev_status
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ldy #ps2kb::STATUS::SEND_CMD
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sty status
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2024-01-01 14:56:11 +01:00
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sta send_cmd ; store if it needs to be resent
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jmp _send_byte
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.endproc
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;;********************************************************************************
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;; @function Send a byte to the keyboard
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;; @modifies A,X,Y
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;; @param A: The byte to send
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;; @details
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;; - pull clock low to stop keyboard transmissions
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;; - setup SR to shift out
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;; - pull data low (by shifting out a zero)
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;; - reset SR
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;; - put (reversed) byte in SR
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;; - put parity + stopbit(s) in send_last_bits variable
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;; - setup interrupt handlers
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;; - enable clock
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2024-01-01 14:56:11 +01:00
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;;********************************************************************************
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.proc _send_byte
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pha
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IO_DisableIRQ ps2kb::VIA, (IO::IRQ::T2 | IO::IRQ::SR)
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2024-01-01 14:56:11 +01:00
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_DisableClock
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2024-01-02 23:37:07 +01:00
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; set shift register to output
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2024-01-09 02:28:54 +01:00
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; shift out the startbit = data low
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; set SR to shift out with PHI2 and shift out zeros
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2024-01-01 14:56:11 +01:00
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lda ps2kb::VIA + IO::ACR
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and #<~IO::ACR_MASK::SR
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2024-01-09 02:28:54 +01:00
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ora #IO::ACR::SR_SOUT_PHI2
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2024-01-01 14:56:11 +01:00
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sta ps2kb::VIA + IO::ACR
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2024-01-02 23:37:07 +01:00
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stz ps2kb::VIA + IO::SR
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2024-01-09 02:28:54 +01:00
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2024-01-02 23:37:07 +01:00
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; reset shift register to start the count at 0 again
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2024-01-09 02:28:54 +01:00
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and #<~IO::ACR_MASK::SR
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sta ps2kb::VIA + IO::ACR
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; set SR to shift out with external clock
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ora #IO::ACR::SR_SOUT_PHIE
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sta ps2kb::VIA + IO::ACR
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2024-01-02 23:37:07 +01:00
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; setup the low timer byte
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lda #<ps2kb::TIMER_SEND
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sta ps2kb::VIA + IO::T2CL
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2024-01-07 00:42:05 +01:00
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; setup interrupt handlers
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2024-01-02 23:37:07 +01:00
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StoreDByte _send_irq_shift_reg_handler, $3000
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2024-01-07 00:42:05 +01:00
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StoreDByte _send_irq_timer_handler, $3060
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2024-01-01 14:56:11 +01:00
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pla
|
2024-01-02 23:37:07 +01:00
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Reverse A
|
2024-01-01 14:56:11 +01:00
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pha
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CalculateOddParity
|
2024-01-02 23:37:07 +01:00
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ror ; Parity -> C
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lda #$ff
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ror ; Parity -> bit 7, rest = 1
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2024-01-07 00:42:05 +01:00
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sta send_last_bits ; loaded into SR by irq handler
|
2024-01-01 14:56:11 +01:00
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pla
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sta ps2kb::VIA + IO::SR
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2024-01-02 23:37:07 +01:00
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IO_EnableIRQ ps2kb::VIA, IO::IRQ::SR
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2024-01-01 14:56:11 +01:00
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_EnableClock
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rts
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.endproc
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;;********************************************************************************
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;; @function Send the lasts 3 bits
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2024-08-08 20:39:25 +02:00
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;; @modifies A
|
2024-01-01 14:56:11 +01:00
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|
;; @details
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;; - load the remaining 3 bits of the transmission into the shift register
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;; - disable shift register interrupts
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;; - enable timer 2 interrupts
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;; - start timer 2
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|
;;********************************************************************************
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|
.proc _send_irq_shift_reg_handler
|
2024-01-07 00:42:05 +01:00
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lda send_last_bits
|
2024-01-01 14:56:11 +01:00
|
|
|
sta ps2kb::VIA + IO::SR
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|
2024-01-02 23:37:07 +01:00
|
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|
IO_DisableIRQ ps2kb::VIA, IO::IRQ::SR
|
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|
IO_EnableIRQ ps2kb::VIA, IO::IRQ::T2
|
2024-01-01 14:56:11 +01:00
|
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|
; start timer, low order count already in latch after init
|
2024-01-02 23:37:07 +01:00
|
|
|
lda #>ps2kb::TIMER_SEND
|
2024-01-01 14:56:11 +01:00
|
|
|
sta ps2kb::VIA + IO::T2CH
|
|
|
|
rts
|
|
|
|
.endproc
|
|
|
|
|
|
|
|
|
|
|
|
;;********************************************************************************
|
2024-01-07 00:42:05 +01:00
|
|
|
;; @function Setup VIA to receive the keyboard's answer
|
2024-08-08 20:39:25 +02:00
|
|
|
;; @modifies A
|
2024-01-01 14:56:11 +01:00
|
|
|
;; @details
|
|
|
|
;; - disable timer 2 interrupts
|
2024-01-07 00:42:05 +01:00
|
|
|
;; - pull clock low
|
|
|
|
;; - or status with RECEIVE_ANSWER
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|
|
|
;; - begin receive
|
2024-01-01 14:56:11 +01:00
|
|
|
;;********************************************************************************
|
|
|
|
.proc _send_irq_timer_handler
|
2024-01-07 00:42:05 +01:00
|
|
|
lda ps2kb::VIA + IO::T2CL ; clear interrupt flag
|
2024-01-01 14:56:11 +01:00
|
|
|
IO_DisableIRQ ps2kb::VIA, IO::IRQ::T2
|
|
|
|
|
2024-01-07 00:42:05 +01:00
|
|
|
; disable shift register
|
|
|
|
lda ps2kb::VIA + IO::ACR
|
|
|
|
and #<~IO::ACR_MASK::SR
|
|
|
|
sta ps2kb::VIA + IO::ACR
|
|
|
|
|
|
|
|
_DisableClock ; disable keyboard while setting up receive
|
|
|
|
lda status
|
|
|
|
ora #ps2kb::STATUS::RECEIVE_ANSWER
|
|
|
|
sta status
|
2024-01-02 23:37:07 +01:00
|
|
|
jmp ps2kb::begin_receive
|
2024-01-01 14:56:11 +01:00
|
|
|
.endproc
|
|
|
|
|
|
|
|
|
2024-01-07 00:42:05 +01:00
|
|
|
;;********************************************************************************
|
|
|
|
;; @function Process the response of a command
|
|
|
|
;; @details
|
|
|
|
;; Stores the answer in the `ps2kb::cmd_response` array.
|
|
|
|
;; If the response is $FE or command related transmissions are done (see below),
|
|
|
|
;; no further data will be sent or received and the `ps2kb::status` takes the previous value.
|
|
|
|
;;
|
|
|
|
;; - store response
|
|
|
|
;; - if response == 0xFE -> stop
|
|
|
|
;; - if status == SEND_CMD -> send databyte
|
|
|
|
;; - if statusk
|
|
|
|
;; You can send anything you want to the keyboard.
|
|
|
|
;; `send_command` will return immediately, as sending the command is asynchronous.
|
|
|
|
;; The command is done if `ps2kb::status & ps2kb::STATUS::SEND == 0`.
|
|
|
|
;; @section Response
|
|
|
|
;; The answers will be in the byte array ps2kb::cmd_response.
|
|
|
|
;; If the command did not have a data byte, cmd_response is:
|
|
|
|
;; - 0: command response
|
|
|
|
;; - 1: NO_RESPONSE or additional response byte (identify keyboard command only)
|
|
|
|
;; - 2: NO_RESPONSE or additional response byte (identify keyboard command only)
|
|
|
|
;; If the command did have a data byte, cmd_response is:
|
|
|
|
;; - 0: 0xFA (ACK) or 0xFE (Resend/Error)
|
|
|
|
;; - 1: 0xFA (ACK) or 0xFE (Resend/Error)
|
|
|
|
;; - 2: NO_RESPONSE or additional response byte
|
|
|
|
;;
|
|
|
|
;; If ANY of the bytes in cmd_response is 0xFE, the command failed.
|
|
|
|
;;
|
2024-08-08 20:39:25 +02:00
|
|
|
;; @modifies A,X,Y
|
2024-01-07 00:42:05 +01:00
|
|
|
;; @param A: The command byte
|
|
|
|
;; @param X: The data byte or NO_DATA if only the command byte should be sent
|
|
|
|
;; @param Y: The number of data bytes expected to receive. Must be one of {0, 1, 2}
|
|
|
|
;;********************************************************************************
|
|
|
|
.proc _process_cmd_answer
|
|
|
|
@store_response:
|
|
|
|
ldx response_length
|
|
|
|
lda scancode
|
|
|
|
sta cmd_response,x
|
|
|
|
inx
|
|
|
|
stx response_length
|
|
|
|
stz scancode
|
|
|
|
; check for resend
|
|
|
|
cmp #$fe
|
|
|
|
beq @cmd_fail
|
|
|
|
; received something useful, check state
|
|
|
|
lda status
|
|
|
|
bit #ps2kb::STATUS::SEND_CMD
|
|
|
|
bne @cmd_sent
|
|
|
|
bit #ps2kb::STATUS::SEND_DATA
|
|
|
|
bne @everything_sent
|
|
|
|
; status must be SEND_RECV
|
|
|
|
|
|
|
|
@receive_data_response:
|
|
|
|
dec expect_data_length
|
|
|
|
bmi @cmd_done ; no more expected data
|
|
|
|
rts ; wait for another data byte
|
|
|
|
|
|
|
|
@cmd_sent:
|
|
|
|
; check if a data byte needs to be sent
|
|
|
|
lda send_data
|
|
|
|
beq @send_data ; if 0 (would fall through the cmp check TODO would it??)
|
|
|
|
cmp #ps2kb::NO_DATA
|
|
|
|
beq @everything_sent ; if not NO_DATA
|
|
|
|
@send_data:
|
|
|
|
lda #ps2kb::STATUS::SEND_DATA
|
|
|
|
sta status
|
|
|
|
lda send_data
|
|
|
|
jmp ps2kb::_send_byte ; send the data
|
|
|
|
|
|
|
|
@everything_sent: ; check if additonal bytes are expected
|
|
|
|
dec expect_data_length
|
|
|
|
bmi @cmd_done ; expect_data_length was 0
|
|
|
|
lda #(ps2kb::STATUS::SEND_RECV | ps2kb::STATUS::RECEIVE_ANSWER)
|
|
|
|
sta status
|
|
|
|
rts
|
|
|
|
|
|
|
|
@cmd_fail: ; keyboard wont expect data byte/send an additional response byte
|
|
|
|
@cmd_done:
|
|
|
|
; restore previous status
|
|
|
|
lda prev_status
|
|
|
|
sta status
|
|
|
|
; disable the clock if the previous was not RECEIVE_KEYS
|
|
|
|
cmp #ps2kb::STATUS::RECEIVE_KEYS
|
|
|
|
beq @rts
|
|
|
|
_DisableClock
|
|
|
|
@rts:
|
|
|
|
rts
|
2024-01-01 14:56:11 +01:00
|
|
|
.endproc
|
2024-01-07 00:42:05 +01:00
|
|
|
|
|
|
|
.rodata
|
2024-08-08 20:15:50 +02:00
|
|
|
;; Format string that can be used by other programs for keyboard command errors
|
2024-01-07 00:42:05 +01:00
|
|
|
FMT_CMD_FAIL: .asciiz "PS/2 Cmd fail: %x-%x > %x%x%x "
|