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e7bd5096cd
| Author | SHA1 | Date | |
|---|---|---|---|
| e7bd5096cd | |||
| aebd813a55 | |||
| 808900602e |
25
main.s65
25
main.s65
@ -42,10 +42,13 @@ irq:
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; DEBUG_LED_ON 2
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@irq_io1:
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lda IO1 + IO::IFR
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and IO1 + IO::IER ; sometimes CB1/2 IFR set even though not enabled in IER
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sta irq_via_ifr
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bbr7 irq_via_ifr,@irq_io2 ; skip
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bbs2 irq_via_ifr,@irq_kb1 ; shit reg -> first 8 bits
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bbs5 irq_via_ifr,@irq_kb2 ; timer -> last 3 bits
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bbr7 irq_via_ifr,@irq_io2 ; skip
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bbs2 irq_via_ifr,@irq_kb_sr
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bbs3 irq_via_ifr,@irq_kb_cb2
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bbs4 irq_via_ifr,@irq_kb_cb1
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bbs5 irq_via_ifr,@irq_kb_t2
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bra @irq_unknown
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@irq_io2:
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lda IO2 + IO::IFR
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@ -56,7 +59,6 @@ irq:
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@irq_unknown:
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; this SHOULD never be reached
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jsr lcd::clear
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Print "Unknown IRQ"
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; force reset interrupt flags
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lda #$ff
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@ -71,14 +73,15 @@ irq:
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bra @irq_return
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; jmp (spi_p::irq_handler)
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; JsrIndirect (spi_p::irq_handler), @irq_return
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@irq_kb1:
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@irq_kb_sr:
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; Print "$3000"
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jsr $3000
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bra @irq_return
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@irq_kb2:
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; Print "$3100"
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jsr $3100
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bra @irq_return
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JsrIndirect ($3000), @irq_return
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@irq_kb_cb2:
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JsrIndirect ($3020), @irq_return
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@irq_kb_cb1:
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JsrIndirect ($3040), @irq_return
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@irq_kb_t2:
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JsrIndirect ($3060), @irq_return
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; @irq_dht:
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; lda IO1 + IO::T1CL ;T1L2 ; clear interrupt flag
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; bra @irq_return
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289
spicode.s65
289
spicode.s65
@ -5,6 +5,8 @@
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.include "keypad.h65"
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.include "keyboard_handler.h65"
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.include "chars.h65"
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.include "parity.h65"
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.include "sleep.h65"
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.import homeloop:absolute
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.import home:absolute
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@ -25,37 +27,30 @@ CODE_START:
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DEBUG_LED_OFF 1
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DEBUG_LED_OFF 2
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StoreDByte kb_irq1, ARG0
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StoreDByte $3000, ARG2
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; lda #<kb_irq1
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; sta ARG0
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; lda #>kb_irq1
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; sta ARG1
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; lda #<$3000
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; sta ARG2
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; lda #>$3000
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; sta ARG3
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ldy #10
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jsr memcopy
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StoreDByte kb_irq2, ARG0
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StoreDByte $3100, ARG2
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; lda #<kb_irq2
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; sta ARG0
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; lda #>kb_irq2
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; sta ARG1
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; lda #<$3100
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; sta ARG2
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; lda #>$3100
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; sta ARG3
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ldy #10
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jsr memcopy
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StoreDByte _process_cmd_answer, $3200
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jsr ps2kb::init
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stz kb::status
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StoreDByte process_scancode,ps2kb::scancode_handler
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jsr ps2kb::begin_receive
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; jsr ps2kb::begin_receive
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JsrIndirect @a1, @a2
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stp
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stp
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stp
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stp
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stp
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@a1:
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lda #'1'
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jsr lcd::print_char
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rts
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stp
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stp
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stp
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stp
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@a2:
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lda #'2'
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jsr lcd::print_char
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lda #'%'
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jsr lcd::print_char
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@ -84,17 +79,17 @@ CODE_START:
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@noscancode:
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bbr5 kb::status, @shift_off
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@shift_on:
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DEBUG_LED_ON 0
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; DEBUG_LED_ON 0
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bra @check_caps
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@shift_off:
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DEBUG_LED_OFF 0
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; DEBUG_LED_OFF 0
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@check_caps:
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bbr4 kb::status, @caps_off
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@caps_on:
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DEBUG_LED_ON 2
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; DEBUG_LED_ON 2
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bra @read_keypad
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@caps_off:
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DEBUG_LED_OFF 2
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; DEBUG_LED_OFF 2
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@read_keypad:
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lda kp::_DEBUG_VAL
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jeq @loop
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@ -113,6 +108,8 @@ CODE_START:
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beq @lB
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cmp #'C'
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beq @lC
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cmp #'D'
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beq @lD
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jsr lcd::print_char
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jmp @loop
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@l1:
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@ -133,8 +130,8 @@ CODE_START:
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iny
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jmp @loop
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@lA:
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lda ps2kb::VIA + IO::SR
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jsr lcd::print_char
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jsr ps2kb::begin_receive
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; StoreDByte _receive_irq_timer_handler, $3100
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jmp @loop
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@lB:
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; Printf "kc%x;", out_str, kb::scancode
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@ -149,26 +146,23 @@ CODE_START:
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@lC:
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jsr lcd::clear
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jmp @loop
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@lD:
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lda ps2kb::STATUS::SEND_CMD
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sta ps2kb::status
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; lda #$ed
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; ldx #%00000111
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; lda #$f6
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; lda #$ff
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lda #$ee
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; ldx #$ee
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; ldx #0
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ldx #ps2kb::NO_DATA
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sta ps2kb::send_cmd
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stx ps2kb::send_data
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jsr _send_byte
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; jsr ps2kb::send_command;
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jmp @loop
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; key_read: .res 2
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; scancode: .res 1
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kb_irq1:
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; lda #'!'
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; jsr lcd::print_char
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jsr ps2kb::_receive_irq_shift_reg_handler
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; lda #':'
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; jsr lcd::print_char
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rts
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.byte '='
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kb_irq2:
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; lda #'?'
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; jsr lcd::print_char
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; jsr kb::on_timer_irq
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jsr ps2kb::_receive_irq_timer_handler
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; lda #';'
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; jsr lcd::print_char
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rts
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.byte '@'
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.proc process_scancode
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@ -297,10 +291,199 @@ kb_irq2:
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rts
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.endproc
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;;********************************************************************************
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;; @macro Enable the clock signal from the keyboard
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;; @modifies: A
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;; @details
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;; Stop pulling the keyboards clock low
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;;********************************************************************************
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.macro _EnableClock
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; set pin to input
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lda ps2kb::VIA + ps2kb::PULL_DDR
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and #<~ps2kb::PULL_MASK_CLK
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sta ps2kb::VIA + ps2kb::PULL_DDR
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.endmacro
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;;********************************************************************************
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;; @macro Disable the clock signal from the keyboard
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;; @modifies: A
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;; @details
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;; Pulls the keyboards clock low
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;;********************************************************************************
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.macro _DisableClock
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; set pin to output
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lda ps2kb::VIA + ps2kb::PULL_DDR
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ora #ps2kb::PULL_MASK_CLK
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sta ps2kb::VIA + ps2kb::PULL_DDR
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; set pin low
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lda ps2kb::VIA + ps2kb::PULL_REG
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and #<~ps2kb::PULL_MASK_CLK
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sta ps2kb::VIA + ps2kb::PULL_REG
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.endmacro
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.proc _send_byte
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pha
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IO_DisableIRQ ps2kb::VIA, (IO::IRQ::T2 | IO::IRQ::SR)
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_DisableClock
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lda #'X'
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jsr lcd::print_char
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; set shift register to output
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lda ps2kb::VIA + IO::ACR
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and #<~IO::ACR_MASK::SR
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ora #IO::ACR::SR_SOUT_PHIE
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sta ps2kb::VIA + IO::ACR
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stz ps2kb::VIA + IO::SR
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; shift out the startbit = data low
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_EnableClock
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_DisableClock
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; reset shift register to start the count at 0 again
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lda #IO::ACR::SR_SOUT_PHIE
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trb ps2kb::VIA + IO::ACR
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tsb ps2kb::VIA + IO::ACR
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; setup the low timer byte
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lda #<ps2kb::TIMER_SEND
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sta ps2kb::VIA + IO::T2CL
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; setup interrupt handlers
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StoreDByte ps2kb::_send_irq_shift_reg_handler, $3000
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; StoreDByte _send_irq_cb2_handler, $3020
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; StoreDByte _send_irq_cb1_handler, $3040
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StoreDByte _send_irq_timer_handler, $3060
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pla
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Reverse A
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pha
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CalculateOddParity
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ror ; Parity -> C
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lda #$ff
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ror ; Parity -> bit 7, rest = 1
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sta ps2kb::send_last_bits ; loaded into SR by irq handler
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pla
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sta ps2kb::VIA + IO::SR
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IO_EnableIRQ ps2kb::VIA, IO::IRQ::SR
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_EnableClock
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rts
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.endproc
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; .proc _send_irq_shift_reg_handler
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; lda ps2kb::send_last_bits
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; sta ps2kb::VIA + IO::SR
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; IO_DisableIRQ ps2kb::VIA, IO::IRQ::SR
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; IO_EnableIRQ ps2kb::VIA, IO::IRQ::T2
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; ; start timer, low order count already in latch after init
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; lda #>ps2kb::TIMER_SEND
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; sta ps2kb::VIA + IO::T2CH
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; rts
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; .endproc
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.proc _send_irq_timer_handler
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lda ps2kb::VIA + IO::T2CL ; clear interrupt flag
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IO_DisableIRQ ps2kb::VIA, IO::IRQ::T2
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; disable shift register
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lda ps2kb::VIA + IO::ACR
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and #<~IO::ACR_MASK::SR
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sta ps2kb::VIA + IO::ACR
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bra _send_done
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; lda ps2kb::VIA + IO::IFR
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; jsr str::uint8_to_hex_str
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; jsr lcd::print_char
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; txa
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; jsr lcd::print_char
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rts
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.endproc
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; @details
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; Set the SEND_CMD_WAIT status bit the first time
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; and jump to _send_done the second time it is called
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; .proc _send_irq_cb1_handler
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; ; clear the flag and disable interrupts
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; ; DEBUG_LED_ON 1
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; lda #'i'
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; jsr lcd::print_char
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; stp
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; lda #IO::IRQ::CB1
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; sta ps2kb::VIA + IO::IFR
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; sta ps2kb::VIA + IO::IER
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; ; DEBUG_LED_OFF 1
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; bra _check_done
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; .endproc
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; .proc _send_irq_cb2_handler
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; ; DEBUG_LED_ON 0
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; ; lda #'I'
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; ; jsr lcd::print_char
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; lda #IO::IRQ::CB2
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; sta ps2kb::VIA + IO::IFR
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; sta ps2kb::VIA + IO::IER
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; ; DEBUG_LED_OFF 0
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; bra _send_done
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; bra _check_done
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; .endproc
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; .proc _check_done
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; ; check if done, by checking if SEND_CMD_WAIT bit is set
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; lda #ps2kb::STATUS::SEND_CMD_WAIT
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; tsb ps2kb::status
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; bne _send_done ; SEND_CMD_WAIT was already set
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; rts
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; .endproc
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.proc _send_done
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_DisableClock ; disable keyboard while setting up receive
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lda #'D'
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jsr lcd::print_char
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; Sleep 1
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lda ps2kb::status
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and #ps2kb::STATUS::SEND_CMD
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beq @status_send_data ; data byte already sent
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@status_send_cmd:
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lda #ps2kb::STATUS::SEND_DATA
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lda ps2kb::status
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; check if a data byte needs to be sent
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lda ps2kb::send_data
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beq @send_data ; if 0
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cmp #ps2kb::NO_DATA
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beq @receive_answer ; if not NO_DATA
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@send_data:
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jmp _send_byte ; send the data
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@status_send_data:
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@receive_answer:
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_DisableClock ; disable keyboard while setting up receive
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DEBUG_LED_ON 0
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lda #ps2kb::STATUS::RECEIVE_ANSWER
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sta ps2kb::status
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jmp ps2kb::begin_receive
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.endproc
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.proc _process_cmd_answer
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Strf fmt_answer, out_str, ps2kb::send_cmd, ps2kb::send_data, ps2kb::scancode
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PrintNC out_str
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DEBUG_LED_ON 1
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stz ps2kb::scancode
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lda ps2kb::prev_status
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sta ps2kb::status
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; set pin to input
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; lda ps2kb::VIA + ps2kb::CLK_PULL_DDR
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; and #<~ps2kb::CLK_PULL_MASK
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; sta ps2kb::VIA + ps2kb::CLK_PULL_DDR
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rts
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.endproc
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out_idx: .res 1
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out_str: .res 40
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char: .res 1
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keycode: .res 1
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keycode_flags: .res 1
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fmt_codechar: .asciiz "%x %x %c "
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fmt_code: .asciiz "%x %x "
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fmt_codechar: .asciiz "%x %x %c "
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fmt_code: .asciiz "%x %x "
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fmt_answer: .asciiz "%x-%x>%x"
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@ -79,10 +79,10 @@ INCLUDE_IOW65C22 = 1
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CA2_IN_AE_IRQ_IND= %00000010 ; Independent interrupt input-negative edge
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CA2_IP_AE = %00000100 ; Input-positive active edge
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CA2_IP_AE_IRQ_IND= %00000110 ; Independent interrupt input-positive edge
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CA2_IN_HANDSHAKE = %00001000 ; Handshake output
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CA2_IN_PULSE_OUT = %00001010 ; Pulse output
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CA2_IN_LOW_OUT = %00001100 ; Low output
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CA2_IN_HIGH_OUT = %00001110 ; High output
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CA2_OUT_HANDSHAKE= %00001000 ; Handshake output
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CA2_OUT_PULSE = %00001010 ; Pulse output
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CA2_OUT_LOW = %00001100 ; Low output
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CA2_OUT_HIGH = %00001110 ; High output
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; CB1 Modes
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CB1_IN_AE = %00000000 ; Input-negative active edge
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CB1_IP_AE = %00010000 ; Input-positive active edge
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@ -91,10 +91,10 @@ INCLUDE_IOW65C22 = 1
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CB2_IN_AE_IRQ_IND= %00100000 ; Independent interrupt input-negative edge
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CB2_IP_AE = %01000000 ; Input-positive active edge
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CB2_IP_AE_IRQ_IND= %01100000 ; Independent interrupt input-positive edge
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CB2_IN_HANDSHAKE = %10000000 ; Handshake output
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CB2_IN_PULSE_OUT = %10100000 ; Pulse output
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CB2_IN_LOW_OUT = %11000000 ; Low output
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CB2_IN_HIGH_OUT = %11100000 ; High output
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CB2_OUT_HANDSHAKE= %10000000 ; Handshake output
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CB2_OUT_PULSE = %10100000 ; Pulse output
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CB2_OUT_LOW = %11000000 ; Low output
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CB2_OUT_HIGH = %11100000 ; High output
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.endenum
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; IFR/IER bits
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@ -30,20 +30,31 @@ INCLUDE_PS2_KEYBOARD = 1
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.scope ps2kb
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Import ps2kb,init,begin_receive,send_command,scancode,status,scancode_handler
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Import ps2kb, _receive_irq_shift_reg_handler, _receive_irq_timer_handler
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Import ps2kb, _receive_irq_shift_reg_handler, _receive_irq_timer_handler, _send_byte, _send_irq_shift_reg_handler, _send_irq_timer_handler,
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Import ps2kb, send_last_bits, send_cmd, send_data, key_read, prev_status
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VIA = IO1
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TIMER = 230 ; 230 ms (@1MHz)
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; Enough time must pass for 3 bits to be shifted in.
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TIMER_RECV = 230 ; 230 ms (@1MHz)
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; Enough time must pass for one bit must be shifted out (parity),
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; but at most two (parity+stop).
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; After that, the interrupt must have happened because the keyboard will pull data low.
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; At that point, the SR needs to be set to input again
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TIMER_SEND = 230 ; 180 ms (@1MHz)
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; use RA4 to pull the clock low
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CLK_PULL_MASK= %00001000
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CLK_PULL_R = IO::RANH
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CLK_PULL_DDR = IO::DDRA
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PULL_REG = IO::RANH
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PULL_DDR = IO::DDRA
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PULL_MASK_CLK = %00010000
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; PULL_MASK_DAT = %00001000
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NO_DATA = $ff ; indicates that no data byte should be send
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.enum STATUS
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RECEIVE_KEYS = %10000000
|
||||
RECEIVE_ANSWER = %01000000
|
||||
SEND_CMD = %00100000
|
||||
SEND_DATA = %00010000
|
||||
SEND_CMD_WAIT = %00001000
|
||||
NONE = %00000000
|
||||
.endenum
|
||||
.endscope
|
||||
|
||||
@ -3,10 +3,12 @@
|
||||
.include "lcd.h65"
|
||||
.include "parity.h65"
|
||||
Export ps2kb,init,begin_receive,send_command,scancode,status,scancode_handler
|
||||
Export ps2kb, _receive_irq_shift_reg_handler, _receive_irq_timer_handler
|
||||
Export ps2kb, _receive_irq_shift_reg_handler, _receive_irq_timer_handler, _send_byte, _send_irq_shift_reg_handler, _send_irq_timer_handler,
|
||||
Export ps2kb, send_last_bits, send_cmd, send_data, key_read, prev_status
|
||||
|
||||
.bss
|
||||
status: .res 1
|
||||
prev_status: .res 1
|
||||
send_last_bits: .res 1
|
||||
send_data: .res 1
|
||||
send_cmd: .res 1
|
||||
@ -24,16 +26,9 @@ scancode_handler: .res 2
|
||||
;;********************************************************************************
|
||||
.macro _EnableClock
|
||||
; set pin to input
|
||||
lda ps2kb::VIA + ps2kb::CLK_PULL_DDR
|
||||
and #<~ps2kb::CLK_PULL_MASK
|
||||
sta ps2kb::VIA + ps2kb::CLK_PULL_DDR
|
||||
.endmacro
|
||||
|
||||
.macro _DisableTimerIRQ
|
||||
; set pin to input
|
||||
lda ps2kb::VIA + ps2kb::CLK_PULL_DDR
|
||||
and #<~ps2kb::CLK_PULL_MASK
|
||||
sta ps2kb::VIA + ps2kb::CLK_PULL_DDR
|
||||
lda ps2kb::VIA + ps2kb::PULL_DDR
|
||||
and #<~ps2kb::PULL_MASK_CLK
|
||||
sta ps2kb::VIA + ps2kb::PULL_DDR
|
||||
.endmacro
|
||||
|
||||
;;********************************************************************************
|
||||
@ -44,17 +39,45 @@ scancode_handler: .res 2
|
||||
;;********************************************************************************
|
||||
.macro _DisableClock
|
||||
; set pin to output
|
||||
lda ps2kb::VIA + ps2kb::CLK_PULL_DDR
|
||||
ora #ps2kb::CLK_PULL_MASK
|
||||
sta ps2kb::VIA + ps2kb::CLK_PULL_DDR
|
||||
lda ps2kb::VIA + ps2kb::PULL_DDR
|
||||
ora #ps2kb::PULL_MASK_CLK
|
||||
sta ps2kb::VIA + ps2kb::PULL_DDR
|
||||
; set pin low
|
||||
lda ps2kb::VIA + ps2kb::CLK_PULL_R
|
||||
and #<~ps2kb::CLK_PULL_MASK
|
||||
sta ps2kb::VIA + ps2kb::CLK_PULL_R
|
||||
lda ps2kb::VIA + ps2kb::PULL_REG
|
||||
and #<~ps2kb::PULL_MASK_CLK
|
||||
sta ps2kb::VIA + ps2kb::PULL_REG
|
||||
.endmacro
|
||||
|
||||
|
||||
;;********************************************************************************
|
||||
;; @macro Stop pulling the keyboard data pin low
|
||||
;; @modifies: A
|
||||
;;********************************************************************************
|
||||
.macro _StopPullDataLow
|
||||
; set pin to input
|
||||
lda ps2kb::VIA + ps2kb::PULL_DDR
|
||||
and #<~ps2kb::PULL_MASK_DAT
|
||||
sta ps2kb::VIA + ps2kb::PULL_DDR
|
||||
.endmacro
|
||||
|
||||
;;********************************************************************************
|
||||
;; @macro Pull the keyboard data pin low
|
||||
;; @modifies: A
|
||||
;;********************************************************************************
|
||||
.macro _PullDataLow
|
||||
; set pin to output
|
||||
lda ps2kb::VIA + ps2kb::PULL_DDR
|
||||
ora #ps2kb::PULL_MASK_DAT
|
||||
sta ps2kb::VIA + ps2kb::PULL_DDR
|
||||
; set pin low
|
||||
lda ps2kb::VIA + ps2kb::PULL_REG
|
||||
and #<~ps2kb::PULL_MASK_DAT
|
||||
sta ps2kb::VIA + ps2kb::PULL_REG
|
||||
.endmacro
|
||||
|
||||
|
||||
.proc init
|
||||
_DisableClock
|
||||
stz key_read
|
||||
stz key_read+1
|
||||
stz scancode
|
||||
@ -64,10 +87,6 @@ scancode_handler: .res 2
|
||||
and #<~IO::ACR_MASK::SR
|
||||
ora #IO::ACR::T2_IRQ_LOAD
|
||||
sta ps2kb::VIA + IO::ACR
|
||||
; the 3 last bits take about 230us, at @1MHz => wait 230 cycles and then the shift register
|
||||
; (this could be shorter since the it takes a few cycles after the interrupt)
|
||||
lda #<ps2kb::TIMER
|
||||
sta ps2kb::VIA + IO::T2CL
|
||||
; load this rts as scancode_handler
|
||||
StoreDByte @rts, scancode_handler
|
||||
@rts:
|
||||
@ -85,25 +104,32 @@ scancode_handler: .res 2
|
||||
.proc begin_receive
|
||||
; disable timer interrupts (this might be called while waiting on the last 3 bits)
|
||||
IO_DisableIRQ ps2kb::VIA, IO::IRQ::T2
|
||||
; set shift register to shift in under external clock on CB1
|
||||
; (re)set shift register to shift in under external clock on CB1
|
||||
lda ps2kb::VIA + IO::ACR
|
||||
and #<~IO::ACR_MASK::SR
|
||||
sta ps2kb::VIA + IO::ACR ; important, disabling SR resets the count
|
||||
ora #IO::ACR::SR_SIN_PHIE
|
||||
sta ps2kb::VIA + IO::ACR
|
||||
stz key_read
|
||||
stz key_read+1
|
||||
stz scancode
|
||||
bit status
|
||||
|
||||
; the 3 last bits take about 230us, at @1MHz => wait 230 cycles and then the shift register
|
||||
; (this could be shorter since the it takes a few cycles after the interrupt)
|
||||
lda #<ps2kb::TIMER_RECV
|
||||
sta ps2kb::VIA + IO::T2CL
|
||||
; set to RECEIVE_KEYS only if RECEIVE_ANSWER is not set
|
||||
bvs @receive_answer
|
||||
bvs @status_set
|
||||
lda #ps2kb::STATUS::RECEIVE_KEYS
|
||||
sta status
|
||||
@receive_answer:
|
||||
@status_set:
|
||||
; todo setup irq handlers
|
||||
StoreDByte _receive_irq_shift_reg_handler, $3000
|
||||
StoreDByte _receive_irq_timer_handler, $3060
|
||||
|
||||
_EnableClock
|
||||
|
||||
; todo setup irq handlers
|
||||
|
||||
IO_EnableIRQ ps2kb::VIA, IO::IRQ::SR
|
||||
; reset and start SR
|
||||
stz ps2kb::VIA + IO::SR
|
||||
@ -132,7 +158,7 @@ scancode_handler: .res 2
|
||||
IO_DisableIRQ ps2kb::VIA, IO::IRQ::SR
|
||||
IO_EnableIRQ ps2kb::VIA, IO::IRQ::T2
|
||||
; start timer, low order count already in latch after init
|
||||
lda #>ps2kb::TIMER
|
||||
lda #>ps2kb::TIMER_RECV
|
||||
sta ps2kb::VIA + IO::T2CH
|
||||
rts
|
||||
.endproc
|
||||
@ -150,7 +176,7 @@ scancode_handler: .res 2
|
||||
;;********************************************************************************
|
||||
.proc _receive_irq_timer_handler
|
||||
lda ps2kb::VIA + IO::SR
|
||||
sta key_read + 1
|
||||
sta key_read+1
|
||||
|
||||
lda ps2kb::VIA + IO::T2CL ; clear interrupt flag
|
||||
|
||||
@ -173,10 +199,13 @@ scancode_handler: .res 2
|
||||
rol ; C -> bit 0, startbit -> C
|
||||
Reverse A
|
||||
sta scancode
|
||||
CalculateOddParity
|
||||
eor key_read+1 ; if bit 0 is 1 - parity error
|
||||
and #1 ; bit 1 is still D7
|
||||
bne @parity_error
|
||||
|
||||
; check parity
|
||||
; CalculateOddParity
|
||||
; eor key_read+1 ; if bit 0 is 1 - parity error
|
||||
; and #1 ; bit 1 is still D7
|
||||
; bne @parity_error
|
||||
|
||||
; check what to do with the scancode
|
||||
bit status
|
||||
bcc @status_not_receive_keys
|
||||
@ -198,15 +227,15 @@ scancode_handler: .res 2
|
||||
;; @function Send a command to the keyboard
|
||||
;; @modifies: A,X,Y
|
||||
;; @param A: The command byte
|
||||
;; @param X: The data byte or 0 if only the command byte should be sent
|
||||
;; @param X: The data byte or NO_DATA if only the command byte should be sent
|
||||
;;********************************************************************************
|
||||
.proc send_command
|
||||
ldy status
|
||||
sty prev_status
|
||||
ldy #ps2kb::STATUS::SEND_CMD
|
||||
sty status
|
||||
sta send_cmd ; store if it needs to be resent
|
||||
cpx #0
|
||||
beq @jmp_send_byte
|
||||
@store_data:
|
||||
stx send_data
|
||||
@jmp_send_byte:
|
||||
jmp _send_byte
|
||||
.endproc
|
||||
|
||||
@ -217,36 +246,51 @@ scancode_handler: .res 2
|
||||
;; @param A: The byte to send
|
||||
;; @details
|
||||
;; - pull clock low to stop keyboard transmissions
|
||||
;; - setup shift register to shift out
|
||||
;; - put startbit + D0-6 in shift register
|
||||
;; - store D7 + parity + stopbit in memory
|
||||
;; - TODO setup SR and T2 interrupt handlers
|
||||
;; - setup SR to shift out
|
||||
;; - pull data low (by shifting out a zero)
|
||||
;; - reset SR
|
||||
;; - put (reversed) byte in SR
|
||||
;; - put parity + stopbit(s) in send_last_bits variable
|
||||
;; - setup interrupt handlers
|
||||
;; - enable clock
|
||||
;;********************************************************************************
|
||||
.proc _send_byte
|
||||
pha
|
||||
IO_DisableIRQ ps2kb::VIA, IO::IRQ::T2
|
||||
IO_DisableIRQ ps2kb::VIA, (IO::IRQ::T2 | IO::IRQ::SR)
|
||||
|
||||
_DisableClock
|
||||
; (re)set shift register to shift out under external clock on CB1
|
||||
|
||||
; set shift register to output
|
||||
lda ps2kb::VIA + IO::ACR
|
||||
and #<~IO::ACR_MASK::SR
|
||||
ora #IO::ACR::SR_SOUT_PHIE
|
||||
sta ps2kb::VIA + IO::ACR
|
||||
IO_EnableIRQ ps2kb::VIA, IO::IRQ::SR
|
||||
stz ps2kb::VIA + IO::SR
|
||||
; shift out the startbit = data low
|
||||
_EnableClock
|
||||
_DisableClock
|
||||
; reset shift register to start the count at 0 again
|
||||
lda #IO::ACR::SR_SOUT_PHIE
|
||||
trb ps2kb::VIA + IO::ACR
|
||||
tsb ps2kb::VIA + IO::ACR
|
||||
|
||||
; setup the low timer byte
|
||||
lda #<ps2kb::TIMER_SEND
|
||||
sta ps2kb::VIA + IO::T2CL
|
||||
|
||||
StoreDByte _send_irq_shift_reg_handler, $3000
|
||||
StoreDByte _send_irq_timer_handler, $3006
|
||||
pla
|
||||
Reverse A
|
||||
pha
|
||||
; split into the 11 bits
|
||||
CalculateOddParity
|
||||
tax
|
||||
ror ; Parity -> C
|
||||
lda #$ff
|
||||
ror ; Parity -> bit 7, rest = 1
|
||||
sta ps2kb::send_last_bits ; loaded into SR by irq handler
|
||||
pla
|
||||
clc ; C = 0 (startbi)
|
||||
rol ; C -> bit 0, D7 -> C
|
||||
sta ps2kb::VIA + IO::SR
|
||||
txa
|
||||
ror ; C -> bit 0 (D7)
|
||||
ora #%00000100 ; set stopbit
|
||||
; A = 000001P7 where 7 = D7, P = Parity
|
||||
sta send_last_bits ; loaded into SR by irq handler
|
||||
; stop pulling clk low, which causes the startbit to be shifted out
|
||||
IO_EnableIRQ ps2kb::VIA, IO::IRQ::SR
|
||||
_EnableClock
|
||||
rts
|
||||
.endproc
|
||||
@ -262,17 +306,13 @@ scancode_handler: .res 2
|
||||
;; - start timer 2
|
||||
;;********************************************************************************
|
||||
.proc _send_irq_shift_reg_handler
|
||||
lda send_last_bits
|
||||
lda ps2kb::send_last_bits
|
||||
sta ps2kb::VIA + IO::SR
|
||||
|
||||
; disable SR interrupts
|
||||
lda #IO::IRQ::SR
|
||||
sta ps2kb::VIA + IO::IER
|
||||
; enable timer interrupts
|
||||
lda #(IO::IRQ::IRQ | IO::IRQ::T2)
|
||||
sta ps2kb::VIA + IO::IER
|
||||
IO_DisableIRQ ps2kb::VIA, IO::IRQ::SR
|
||||
IO_EnableIRQ ps2kb::VIA, IO::IRQ::T2
|
||||
; start timer, low order count already in latch after init
|
||||
lda #>ps2kb::TIMER
|
||||
lda #>ps2kb::TIMER_SEND
|
||||
sta ps2kb::VIA + IO::T2CH
|
||||
rts
|
||||
.endproc
|
||||
@ -293,21 +333,20 @@ scancode_handler: .res 2
|
||||
.proc _send_irq_timer_handler
|
||||
lda ps2kb::VIA + IO::T2CL ; clear interrupt flag
|
||||
IO_DisableIRQ ps2kb::VIA, IO::IRQ::T2
|
||||
; no SR reset necessary, will be done in begin_receive or send_byte
|
||||
|
||||
lda send_data
|
||||
lda ps2kb::send_data
|
||||
beq @receive
|
||||
stz send_data
|
||||
stz ps2kb::send_data
|
||||
jmp _send_byte
|
||||
rts
|
||||
@receive:
|
||||
_DisableClock ; disable keyboard while setting up receive
|
||||
lda #ps2kb::STATUS::RECEIVE_ANSWER
|
||||
sta status
|
||||
jmp begin_receive
|
||||
sta ps2kb::status
|
||||
jmp ps2kb::begin_receive
|
||||
.endproc
|
||||
|
||||
|
||||
.proc _process_cmd_answer
|
||||
@success:
|
||||
rts
|
||||
jmp ($3200)
|
||||
.endproc
|
||||
|
||||
@ -98,15 +98,15 @@ INCLUDE_UTILITY = 1
|
||||
.macro JsrIndirect addr,ret_addr
|
||||
; -1 because rts increments it
|
||||
.if .blank(ret_addr)
|
||||
lda #<(:+ - 1)
|
||||
pha
|
||||
lda #>(:+ - 1)
|
||||
pha
|
||||
.else
|
||||
lda #<(ret_addr -1)
|
||||
lda #<(:+ - 1)
|
||||
pha
|
||||
.else
|
||||
lda #>(ret_addr -1)
|
||||
pha
|
||||
lda #<(ret_addr -1)
|
||||
pha
|
||||
.endif
|
||||
jmp addr
|
||||
.if .blank(ret_addr)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user