use other shift mode instead of generating clk pulse
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@ -293,18 +293,20 @@ scancode_handler: .res 2 ; pointer to a function that handles new scancod
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_DisableClock
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; set shift register to output
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; shift out the startbit = data low
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; set SR to shift out with PHI2 and shift out zeros
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lda ps2kb::VIA + IO::ACR
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and #<~IO::ACR_MASK::SR
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ora #IO::ACR::SR_SOUT_PHIE
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ora #IO::ACR::SR_SOUT_PHI2
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sta ps2kb::VIA + IO::ACR
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stz ps2kb::VIA + IO::SR
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; shift out the startbit = data low
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_EnableClock
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_DisableClock
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; reset shift register to start the count at 0 again
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lda #IO::ACR::SR_SOUT_PHIE
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trb ps2kb::VIA + IO::ACR
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tsb ps2kb::VIA + IO::ACR
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and #<~IO::ACR_MASK::SR
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sta ps2kb::VIA + IO::ACR
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; set SR to shift out with external clock
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ora #IO::ACR::SR_SOUT_PHIE
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sta ps2kb::VIA + IO::ACR
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; setup the low timer byte
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lda #<ps2kb::TIMER_SEND
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