MatthiasQuintern/6502-OS
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

use IO enum

Browse Source
This commit is contained in:
matthias@rpi 2023-11-01 13:13:23 +01:00
parent 55d0926fe4
commit 498d61186a
8 changed files with 214 additions and 173 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

38
main.s65
View File

@ -2,23 +2,23 @@
.include "system/system.h65" .include "system/system.h65"
.macro DEBUG_LED_OFF nr .macro DEBUG_LED_OFF nr
lda IO1 + IO_RA lda IO1 + IO::RA
.if nr = 0 .if nr = 0
and #%11111110 and #%11111110
.else .else
and #%11111101 and #%11111101
.endif .endif
sta IO1 + IO_RA sta IO1 + IO::RA
.endmacro .endmacro
.macro DEBUG_LED_ON nr .macro DEBUG_LED_ON nr
lda IO1 + IO_RA lda IO1 + IO::RA
.if nr = 0 .if nr = 0
ora #%00000001 ora #%00000001
.else .else
ora #%00000010 ora #%00000010
.endif .endif
sta IO1 + IO_RA sta IO1 + IO::RA
.endmacro .endmacro
;******************************************************************************** ;********************************************************************************
@ -45,19 +45,19 @@ SPI_IO = IO1
;******************************************************************************** ;********************************************************************************
nmi: nmi:
lda #'%' lda #'%'
jsr _lcd_char jsr lcd_char
rti rti
irq: irq:
; read IRFs, while bit 7 ist set handle interrupts ; read IRFs, while bit 7 ist set handle interrupts
; Print str_irq ; Print str_irq
@irq_io1: @irq_io1:
; todo use a reserved address instead of 0 ; todo use a reserved address instead of 0
lda IO1+IO_IFR lda IO1+IO::IFR
sta 0 sta 0
bbr7 0,@irq_io2 bbr7 0,@irq_io2
bbs2 0,@irq_spi_p ; check SR bbs2 0,@irq_spi_p ; check SR
@irq_io2: @irq_io2:
lda IO2+IO_IFR lda IO2+IO::IFR
sta 0 sta 0
bbr7 0,@irq_return bbr7 0,@irq_return
bbs4 0,@irq_keypad ; check CB1 bbs4 0,@irq_keypad ; check CB1
@ -65,18 +65,18 @@ irq:
Print str_irq_unknown Print str_irq_unknown
; force reset interrupt flags ; force reset interrupt flags
lda #$ff lda #$ff
sta IO1 + IO_IFR sta IO1 + IO::IFR
sta IO2 + IO_IFR sta IO2 + IO::IFR
bra @irq_return bra @irq_return
@irq_keypad: @irq_keypad:
jsr kp_read_on_irq jsr kp_read_on_irq
bra irq bra @irq_return
@irq_spi_p: @irq_spi_p:
jsr spi_p_read jsr spi_p_read
bra irq bra @irq_return
@irq_dht: @irq_dht:
lda IO1 + IO_T1CL ;T1L2 ; clear interrupt flag lda IO1 + IO::T1CL ;T1L2 ; clear interrupt flag
bra irq bra @irq_return
@irq_return: @irq_return:
rti rti
@ -84,16 +84,16 @@ irq:
; Reset sequence ; Reset sequence
;******************************************************************************** ;********************************************************************************
reset: reset:
jsr spi_p_init
jsr lcd_init jsr lcd_init
jsr kp_init jsr kp_init
jsr spi_p_init
lda #$ff lda #$ff
sta IO1 + IO_DDRA sta IO1 + IO::DDRA
DEBUG_LED_ON 0 DEBUG_LED_OFF 0
DEBUG_LED_ON 1 DEBUG_LED_OFF 1
; ; INIT DHT ; ; INIT DHT
; lda #%11000010 ; enable interrupt for Timer 1 and CA1 on IO2 ; lda #%11000010 ; enable interrupt for Timer 1 and CA1 on IO2
@ -149,7 +149,7 @@ wait:
jmp home jmp home
debug: debug:
DEBUG_LED_OFF 0 DEBUG_LED_ON 0
jmp home jmp home

14
programs/printer.s65
View File

@ -5,16 +5,12 @@
INCLUDE_PRINTER = 1 INCLUDE_PRINTER = 1
printer: printer:
stz LCD_CHARCOUNT jsr lcd_clear
lda #%10000000 @printer_loop:
jsr _lcd_cmd
lda #LCD_CMD_CLEAR
jsr _lcd_cmd
@printer:
jsr rb_keypad_read jsr rb_keypad_read
beq @printer beq @printer_loop
cmp #'*' cmp #'*'
jeq return_home jeq return_home
jsr _lcd_char jsr lcd_char
bra @printer bra @printer_loop
.endif .endif

27
system/buffer.s65
View File

@ -58,13 +58,14 @@ RB_LENGTH = RBUF_MEM_END - RBUF_MEM_START - 2
cpx RB_WRITE cpx RB_WRITE
beq @rb_read_rts ; if buffer empty beq @rb_read_rts ; if buffer empty
lda RB_START,x lda RB_START,x
inx ; increment RB_READ pointer Inc_buf_ptr RB_READ
inx ; increment RB_READ pointer, not using macro bec. of unknown Pz
cpx #RB_LENGTH cpx #RB_LENGTH
beq @rb_read_jump beq @read_wrap
stx RB_READ stx RB_READ
@rb_read_rts: @rb_read_rts:
rts rts
@rb_read_jump: @read_wrap: ; ptr == RB_LENGTH -> ptr = 0
stz RB_READ stz RB_READ
; make sure Pz is not set ; make sure Pz is not set
ldx #$01 ldx #$01
@ -76,6 +77,7 @@ RB_LENGTH = RBUF_MEM_END - RBUF_MEM_START - 2
; @param A: value to store ; @param A: value to store
; @modifies: X ; @modifies: X
;******************************************************************************** ;********************************************************************************
;TODO increment read when write reaches it
.ident(.concat(_RBUF_NAME, "_write")): .ident(.concat(_RBUF_NAME, "_write")):
.scope .scope
; lda kp_VALUES, x ; load the char in a ; lda kp_VALUES, x ; load the char in a
@ -83,15 +85,26 @@ RB_LENGTH = RBUF_MEM_END - RBUF_MEM_START - 2
sta RB_START,x sta RB_START,x
inx ; increment write pointer inx ; increment write pointer
cpx #RB_LENGTH cpx #RB_LENGTH
beq @rb_jump_write beq @write_wrap
stx RB_WRITE stx RB_WRITE
@check_buf_full: ; increment read if buffer is full
cpx RB_READ
beq read_inc
rts rts
@rb_jump_write: ; when the end of the buffer is reached, the next keys go to the start again @write_wrap: ; ptr == RB_LENGTH -> ptr = 0
stz RB_WRITE stz RB_WRITE
bra @check_buf_full
@read_inc:
ldx RB_READ
inx
cpx #RB_LENGTH
beq read_wrap
stx RB_READ
rts
@read_wrap: ; ptr == RB_LENGTH -> ptr = 0
stz RB_READ
rts rts
.endscope .endscope
.undefine _RBUF_NAME .undefine _RBUF_NAME
.undefine RBUF_NAME .undefine RBUF_NAME

168
system/io_W65C22.h65
View File

@ -8,82 +8,99 @@
.ifndef INCLUDE_IOW65C22 .ifndef INCLUDE_IOW65C22
INCLUDE_IOW65C22 = 1 INCLUDE_IOW65C22 = 1
; IO-CHIPS OFFSETS FOR PINS FROM BASE ADDRESS .scope IO
IO_RB = $0 ; Register B (ORB/IRB)
IO_RA = $1 ; Register A (ORA/IRA)
IO_DDRB = $2 ; Data Direction Register B
IO_DDRA = $3 ; Data Direction Register A
IO_T1CL = $4 ; Timer 1 Counter Low/High
IO_T1CH = $5
IO_T1LL = $6 ; Timer 1 Latch Low/High
IO_T1LH = $7
IO_T2CL = $8 ; Timer 2 Counter Low/High
IO_T2CH = $9
IO_SR = $a ; Shift Register
IO_ACR = $b ; Auxiliary Control Register
; ACR Masks
IO_ACR_MASK_PA = %00000001 ;
IO_ACR_MASK_PB = %00000010 ;
IO_ACR_MASK_SR = %00011100 ;
IO_ACR_MASK_T2 = %00100000 ;
IO_ACR_MASK_T1 = %11000000 ;
; SR Modes
IO_ACR_SR_DISABLE = %00000000 ; Disabled
IO_ACR_SR_SIN_T2 = %00000100 ; Shift in under control of T2
IO_ACR_SR_SIN_PHI2 = %00001000 ; Shift in under control of PHI2
IO_ACR_SR_SIN_PHIE = %00001100 ; Shift in under control of external clock
IO_ACR_SR_SOUT_FREE_T2 = %00010000 ; Shift out free running at T2 rate
IO_ACR_SR_SOUT_T2 = %00010100 ; Shift out under control of T2
IO_ACR_SR_SOUT_PHI2 = %00011000 ; Shift out under control of PHI2
IO_ACR_SR_SOUT_PHIE = %00011100 ; Shift out under control of external clock
; T1 Modes
IO_ACR_T1_IRQ_LOAD = %00000000 ; Timed interrupt each time T1 is loaded
IO_ACR_T1_IRQ_CONT = %01000000 ; Continuous interrupts
IO_ACR_T1_IRQ_LOAD_PB7 = %10000000 ; Timed interrupt each time T1 is loaded - PB7 One Shot output
IO_ACR_T1_IRQ_CONT_PB7 = %11000000 ; Continuous interrupts - PB7 Square wave output
IO_PCR = $c ; Peripheral Control Register
; PCR Masks
IO_PCR_MASK_CA1 = %00000001 ;
IO_PCR_MASK_CA2 = %00001110 ;
IO_PCR_MASK_CB1 = %00010000 ;
IO_PCR_MASK_CB2 = %11100000 ;
; CA1 Modes
IO_PCR_CA1_IN_AE = %00000000 ; Input-negative active edge
IO_PCR_CA1_IP_AE = %00000001 ; Input-positive active edge
; CA2 Modes
IO_PCR_CA2_IN_AE = %00000000 ; Input-negative active edge
IO_PCR_CA2_IN_AE_IRQ_IND= %00000010 ; Independent interrupt input-negative edge
IO_PCR_CA2_IP_AE = %00000100 ; Input-positive active edge
IO_PCR_CA2_IP_AE_IRQ_IND= %00000110 ; Independent interrupt input-positive edge
IO_PCR_CA2_IN_HANDSHAKE = %00001000 ; Handshake output
IO_PCR_CA2_IN_PULSE_OUT = %00001010 ; Pulse output
IO_PCR_CA2_IN_LOW_OUT = %00001100 ; Low output
IO_PCR_CA2_IN_HIGH_OUT = %00001110 ; High output
; CB1 Modes
IO_PCR_CB1_IN_AE = %00000000 ; Input-negative active edge
IO_PCR_CB1_IP_AE = %00010000 ; Input-positive active edge
; CB2 Modes
IO_PCR_CB2_IN_AE = %00000000 ; Input-negative active edge
IO_PCR_CB2_IN_AE_IRQ_IND= %00100000 ; Independent interrupt input-negative edge
IO_PCR_CB2_IP_AE = %01000000 ; Input-positive active edge
IO_PCR_CB2_IP_AE_IRQ_IND= %01100000 ; Independent interrupt input-positive edge
IO_PCR_CB2_IN_HANDSHAKE = %10000000 ; Handshake output
IO_PCR_CB2_IN_PULSE_OUT = %10100000 ; Pulse output
IO_PCR_CB2_IN_LOW_OUT = %11000000 ; Low output
IO_PCR_CB2_IN_HIGH_OUT = %11100000 ; High output
IO_IFR = $d ; Interrupt Flag Register .enum
; IFR bits ; IO-CHIPS OFFSETS FOR PINS FROM BASE ADDRESS
IO_IFR_CA2 = 0 RB = $0 ; Register B (ORB/IRB)
IO_IFR_CA1 = 1 RA = $1 ; Register A (ORA/IRA)
IO_IFR_SR = 2 DDRB = $2 ; Data Direction Register B
IO_IFR_CB2 = 3 DDRA = $3 ; Data Direction Register A
IO_IFR_CB1 = 4 T1CL = $4 ; Timer 1 Counter Low/High
IO_IFR_T2 = 5 T1CH = $5
IO_IFR_T1 = 6 T1LL = $6 ; Timer 1 Latch Low/High
IO_IFR_IRQ = 7 T1LH = $7
IO_IER = $e ; Interrupt Enable Register T2CL = $8 ; Timer 2 Counter Low/High
IO_RANH = $f ; no handshake T2CH = $9
SR = $a ; Shift Register
ACR = $b ; Auxiliary Control Register
PCR = $c ; Peripheral Control Register
IFR = $d ; Interrupt Flag Register
IER = $e ; Interrupt Enable Register
RANH = $f ; RA without handshake
.endenum
.enum ACR_MASK ; ACR Masks
PA = %00000001
PB = %00000010
SR = %00011100
T2 = %00100000
T1 = %11000000
.endenum
.enum ACR ; ACR Settings
; SR Modes
SR_DISABLE = %00000000 ; Disabled
SR_SIN_T2 = %00000100 ; Shift in under control of T2
SR_SIN_PHI2 = %00001000 ; Shift in under control of PHI2
SR_SIN_PHIE = %00001100 ; Shift in under control of external clock
SR_SOUT_FREE_T2 = %00010000 ; Shift out free running at T2 rate
SR_SOUT_T2 = %00010100 ; Shift out under control of T2
SR_SOUT_PHI2 = %00011000 ; Shift out under control of PHI2
SR_SOUT_PHIE = %00011100 ; Shift out under control of external clock
; T1 Modes
T1_IRQ_LOAD = %00000000 ; Timed interrupt each time T1 is loaded
T1_IRQ_CONT = %01000000 ; Continuous interrupts
T1_IRQ_LOAD_PB7 = %10000000 ; Timed interrupt each time T1 is loaded - PB7 One Shot output
T1_IRQ_CONT_PB7 = %11000000 ; Continuous interrupts - PB7 Square wave output
; todo: others
.endenum
.enum PCR_MASK ; PCR Masks
CA1 = %00000001 ;
CA2 = %00001110 ;
CB1 = %00010000 ;
CB2 = %11100000 ;
.endenum
.enum PCR
; CA1 Modes
CA1_IN_AE = %00000000 ; Input-negative active edge
CA1_IP_AE = %00000001 ; Input-positive active edge
; CA2 Modes
CA2_IN_AE = %00000000 ; Input-negative active edge
CA2_IN_AE_IRQ_IND= %00000010 ; Independent interrupt input-negative edge
CA2_IP_AE = %00000100 ; Input-positive active edge
CA2_IP_AE_IRQ_IND= %00000110 ; Independent interrupt input-positive edge
CA2_IN_HANDSHAKE = %00001000 ; Handshake output
CA2_IN_PULSE_OUT = %00001010 ; Pulse output
CA2_IN_LOW_OUT = %00001100 ; Low output
CA2_IN_HIGH_OUT = %00001110 ; High output
; CB1 Modes
CB1_IN_AE = %00000000 ; Input-negative active edge
CB1_IP_AE = %00010000 ; Input-positive active edge
; CB2 Modes
CB2_IN_AE = %00000000 ; Input-negative active edge
CB2_IN_AE_IRQ_IND= %00100000 ; Independent interrupt input-negative edge
CB2_IP_AE = %01000000 ; Input-positive active edge
CB2_IP_AE_IRQ_IND= %01100000 ; Independent interrupt input-positive edge
CB2_IN_HANDSHAKE = %10000000 ; Handshake output
CB2_IN_PULSE_OUT = %10100000 ; Pulse output
CB2_IN_LOW_OUT = %11000000 ; Low output
CB2_IN_HIGH_OUT = %11100000 ; High output
.endenum
; IFR/IER bits
.enum IRQ
CA2 = %00000001
CA1 = %00000010
SR = %00000100
CB2 = %00001000
CB1 = %00010000
T2 = %00100000
T1 = %01000000
IRQ = %10000000
.endenum
; TODO: leave? ; TODO: leave?
; .struct VIA_Pins ; .struct VIA_Pins
@ -105,4 +122,5 @@ IO_RANH = $f ; no handshake
; RANH .byte ; $f ; no handshake ; RANH .byte ; $f ; no handshake
; .endstruct ; .endstruct
.endif .endif
.endscope

44
system/keypad.s65
View File

@ -22,29 +22,28 @@ RBUF_MEM_END = $2ff
.define RBUF_NAME "keypad" .define RBUF_NAME "keypad"
.include "buffer.s65" .include "buffer.s65"
KB_VAR = $05 KB_VAR = $05 ; any free zp address
KB_LAST = $06
.proc kp_init .proc kp_init
; todo remove ; todo remove later and test
stz KB_LAST
; todo remove later
lda #$ff lda #$ff
sta KP_IO+IO_DDRB sta KP_IO+IO::DDRB
stz KP_IO+IO_RB stz KP_IO+IO::RB
; INIT KEYPAD ; INIT KEYPAD
lda #%00001111; KP_IO+IO_RB 0-3 output ; todo: use masks
sta KP_IO+IO_DDRB lda #%00001111; KP_IO+IO::RB 0-3 output
stz KP_IO+IO_RB ; KP_IO+IO_RB 4-7 1 so keypad press can be detected sta KP_IO+IO::DDRB
stz KP_IO+IO_ACR stz KP_IO+IO::RB ; KP_IO+IO::RB 4-7 1 so keypad press can be detected
stz KP_IO+IO::ACR
; lda #%00010000 ; set CB1 to interrupt on pos. edge ; lda #%00010000 ; set CB1 to interrupt on pos. edge
lda #IO_PCR_CB1_IP_AE ; todo: use masks
sta KP_IO+IO_PCR lda #IO::PCR::CB1_IP_AE
sta KP_IO+IO::PCR
jsr rb_keypad_init ; init keybuffer jsr rb_keypad_init ; init keybuffer
lda #%10010000 ; enable interrupt for CB1 on KP_IO lda #(IO::IRQ::IRQ | IO::IRQ::CB1) ; enable interrupt for CB1 on KP_IO
sta KP_IO+IO_IER sta KP_IO+IO::IER
rts rts
.endproc .endproc
@ -57,6 +56,7 @@ KB_LAST = $06
;******************************************************************************** ;********************************************************************************
.proc kp_read_on_irq .proc kp_read_on_irq
; test each "row" and check which column is 1 ; test each "row" and check which column is 1
; todo dont check every column if the value has been found
lda #%00001110 lda #%00001110
ldx #$00 ldx #$00
jsr @kp_read_column jsr @kp_read_column
@ -69,10 +69,12 @@ KB_LAST = $06
lda #%00000111 lda #%00000111
ldx #$0c ldx #$0c
jsr @kp_read_column jsr @kp_read_column
bra @kp_read_rts stz KP_IO+IO::RB ; todo why all zero?
; lda KP_IO+IO::RB ; read to definetly clear the interrupt flag
rts
@kp_read_column: @kp_read_column:
sta KP_IO+IO_RB sta KP_IO+IO::RB
lda KP_IO+IO_RB lda KP_IO+IO::RB
sta KB_VAR ; store result in zeropage so that bbr can be used sta KB_VAR ; store result in zeropage so that bbr can be used
bbr4 KB_VAR,@kp_write bbr4 KB_VAR,@kp_write
inx inx
@ -83,14 +85,8 @@ KB_LAST = $06
bbr7 KB_VAR,@kp_write bbr7 KB_VAR,@kp_write
rts rts
@kp_write: @kp_write:
; temporary: store last keypress in KB_LAST, TODO: remove
lda kp_VALUES,x lda kp_VALUES,x
sta KB_LAST
txa
jsr rb_keypad_write jsr rb_keypad_write
@kp_read_rts:
stz KP_IO+IO_RB
; lda KP_IO+IO_RB ; read to definetly clear the interrupt flag
rts rts
.endproc .endproc

74
system/lcd.s65
View File

@ -59,11 +59,11 @@ LCD_CLEAR = %00000000
.proc lcd_init .proc lcd_init
; init IO ; init IO
lda #$ff ; RB 0-7 output lda #$ff ; RB 0-7 output
sta LCD_IO+IO_DDRB sta LCD_IO+IO::DDRB
; UT_update_with_mask LCD_IO + IO_DDRA, (LCD_RS | LCD_RW | LCD_E), (LCD_RS | LCD_RW | LCD_E) ; UT_update_with_mask LCD_IO + IO::DDRA, (LCD_RS | LCD_RW | LCD_E), (LCD_RS | LCD_RW | LCD_E)
lda #(LCD_RS | LCD_RW | LCD_E) ; RA 5-7 output lda #(LCD_RS | LCD_RW | LCD_E) ; RA 5-7 output
sta LCD_IO+IO_DDRA sta LCD_IO+IO::DDRA
; init lcd ; init lcd
lda #LCD_CMD_FUNCTION_SET lda #LCD_CMD_FUNCTION_SET
@ -105,7 +105,7 @@ LCD_CLEAR = %00000000
@lcd_print_loop: @lcd_print_loop:
lda (ARG0),y lda (ARG0),y
beq @lcd_print_end beq @lcd_print_end
jsr _lcd_char jsr lcd_char
iny iny
bra @lcd_print_loop bra @lcd_print_loop
@lcd_print_end: @lcd_print_end:
@ -126,26 +126,50 @@ LCD_CLEAR = %00000000
.endmacro .endmacro
;******************************************************************************** ;********************************************************************************
; LCD Commands ; @macro Print a single character
; @param A: Character to print
;********************************************************************************
.proc lcd_char
pha
pha
; TODO use UT_update_with_mask?
jsr _lcd_wait_nbusy
pla
sta LCD_IO + IO::RB
lda #LCD_RS
sta LCD_IO + IO::RA
lda #(LCD_RS | LCD_E)
sta LCD_IO + IO::RA
lda #LCD_RS
sta LCD_IO + IO::RA
inc LCD_CHARCOUNT
jsr _lcd_set_address
pla ; put char back in a
.endproc
;********************************************************************************
; Internal LCD Commands
;******************************************************************************** ;********************************************************************************
; read busy flag ; read busy flag
_lcd_wait_nbusy: .proc _lcd_wait_nbusy
stz LCD_IO + IO_DDRB ; set IO1-LCD_IO + IO_RB to input stz LCD_IO + IO::DDRB ; set IO1-LCD_IO + IO::RB to input
@lcd_wait_nbusy_loop: ; read the busy flag @lcd_wait_nbusy_loop: ; read the busy flag
lda #LCD_RW lda #LCD_RW
sta LCD_IO + IO_RA sta LCD_IO + IO::RA
lda #(LCD_RW | LCD_E) lda #(LCD_RW | LCD_E)
sta LCD_IO + IO_RA sta LCD_IO + IO::RA
lda LCD_IO + IO_RB lda LCD_IO + IO::RB
and #%10000000 ; and updates zero flag, if not set retry and #%10000000 ; and updates zero flag, if not set retry
bne @lcd_wait_nbusy_loop bne @lcd_wait_nbusy_loop
lda #%00000000 ; TODO dont overwrite 0-4 lda #%00000000 ; TODO dont overwrite 0-4
sta LCD_IO + IO_RA sta LCD_IO + IO::RA
lda #%11111111 ; set IO1-LCD_IO + IO_RB to output lda #%11111111 ; set IO1-LCD_IO + IO::RB to output
sta LCD_IO + IO_DDRB sta LCD_IO + IO::DDRB
rts rts
.endproc
.proc _lcd_cmd ; send cmd in acc .proc _lcd_cmd ; send cmd in acc
pha pha
@ -153,32 +177,16 @@ _lcd_wait_nbusy:
pla pla
; TODO use UT_update_with_mask? ; TODO use UT_update_with_mask?
sta LCD_IO + IO_RB sta LCD_IO + IO::RB
lda #LCD_CLEAR lda #LCD_CLEAR
sta LCD_IO + IO_RA sta LCD_IO + IO::RA
lda #LCD_E lda #LCD_E
sta LCD_IO + IO_RA sta LCD_IO + IO::RA
lda #LCD_CLEAR lda #LCD_CLEAR
sta LCD_IO + IO_RA sta LCD_IO + IO::RA
rts rts
.endproc .endproc
_lcd_char:
pha
pha
; TODO use UT_update_with_mask?
jsr _lcd_wait_nbusy
pla
sta LCD_IO + IO_RB
lda #LCD_RS
sta LCD_IO + IO_RA
lda #(LCD_RS | LCD_E)
sta LCD_IO + IO_RA
lda #LCD_RS
sta LCD_IO + IO_RA
inc LCD_CHARCOUNT
jsr _lcd_set_address
pla ; put char back in a
;******************************************************************************** ;********************************************************************************
; Set the LCD DD-RAM Address so that text linebreaks after 16 chars ; Set the LCD DD-RAM Address so that text linebreaks after 16 chars

12
system/spi.s65
View File

@ -33,19 +33,19 @@ INCLUDE_SPI = 1
.proc spi_p_init .proc spi_p_init
; todo USE MASKS ; todo USE MASKS
; set Shift register to shift in under external clock on CB1 ; set Shift register to shift in under external clock on CB1
lda #%00001100 lda #IO::ACR::SR_SIN_PHIE
sta SPI_IO + IO_ACR sta SPI_IO + IO::ACR
; enable SR interrupts ; enable SR interrupts
lda #%10000100 lda #(IO::IRQ::IRQ | IO::IRQ::SR)
sta SPI_IO + IO_IER sta SPI_IO + IO::IER
rts rts
.endproc .endproc
.proc spi_p_read .proc spi_p_read
; print received byte ; print received byte
lda SPI_IO + IO_SR lda SPI_IO + IO::SR
jsr _lcd_char jsr lcd_char
rts rts
.endproc .endproc

10
utility.h65
View File

@ -21,3 +21,13 @@ INCLUDE_UTILITY = 1
sta original sta original
.endmacro .endmacro
.endif .endif
;_n_genlabel .set 0
;;********************************************************************************
;; @macro Generate a unique label
;;********************************************************************************
;.macro genlabel
; .ident(.sprintf("generated_label%04X", _n_genlabel))
; _n_genlabel .set _n_genlabel + 1
;.endmacro