2023-12-08 22:56:35 +01:00
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;;********************************************************************************
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2024-08-08 21:11:25 +02:00
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;; @file
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;; @brief DHT22 driver (WIP)
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;; @ingroup driver
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2023-12-08 22:56:35 +01:00
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;; @details
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;; @depends IO-W65C22N
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2024-08-08 21:11:25 +02:00
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;;
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2023-12-08 22:56:35 +01:00
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;;********************************************************************************
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;;TODO EVERYTHING
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;DHT_REQUEST_L = $00
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;DHT_REQUEST_H = %01010000 ; = 20480 PHI2 pulses = 20,5 ms at 1 MHz
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;DHT_RECV_H = %10011100
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;DHT_RECV_L = %01000000 ; = 40000 PHI2 = 40ms
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;; Status Variables, Used to determine what is sent by temp module
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;DHT_STATUS = $400
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;DHT_NONE = 0
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;DHT_WAIT_REQ = 1
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;DHT_WAIT_RESP = 2
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;DHT_RECV = 3
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;DHT_DONE = 4
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;DHT_BIT = $401
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;DHT_BIT_ROT = $402
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;DHT_VALUES = $405 ;
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;DHT_OFFSET = $403
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;DHT_OFF_RH_HIGH = 0 ; offsets to DHT_VALUES
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;DHT_OFF_RH_LOW = 1
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;DHT_OFF_T_HIGH = 2
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;DHT_OFF_T_LOW = 3
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;DHT_OFF_CHECKSUM = 4
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;DHT_OFF_DONE = 5
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;message_dht: .asciiz "DHT-Request gesendet."
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;dht_wait:
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; ldx #$00
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;dht_wait_:
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; lda message_dht,x
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; sta TO_PRINT,x
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; inx
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; bne dht_wait_
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; jsr lcd_print_clear
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;dht_wait_loop: ; check after every interrpt if dht program is done and then return home
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; lda #'.'
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; jsr _lcd::print_char
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; wai
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; lda DHT_STATUS
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; cmp #DHT_DONE
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; bne dht_wait_loop
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;dht_exit:
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; jsr kb_read
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; cmp #'*'
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; jeq home
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; bra dht_exit
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; jmp return_home
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;dht_request: ; send request to sensor
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; sei
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2023-12-08 22:56:35 +01:00
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; lda #%00000001 ; set PA1-0 to output 0
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; ora IO2 + IO_DDRA
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; sta IO2 + IO_DDRA
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; lda #(LCD_CLEAR | $00)
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; sta IO2 + IO_RA
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2023-12-08 22:56:35 +01:00
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; ; start timer
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; lda #DHT_REQUEST_L
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; sta IO2 + IO_T1CL
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; lda #DHT_REQUEST_H
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; sta IO2 + IO_T1CH
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2023-12-08 22:56:35 +01:00
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; lda #DHT_WAIT_REQ
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; sta DHT_STATUS
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; cli
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; jmp dht_wait
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;dht_request_end:
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; lda #%10000010
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; sta IO2 + IO_IER ; enable Interrupt for CA1
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; lda #%11111110
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; and IO2 + IO_DDRA
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; sta IO2 + IO_DDRA ; set PA1-0 to input
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; lda #DHT_WAIT_RESP
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;dht_response: ; receive response from sensor
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; lda #DHT_RECV
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; sta DHT_STATUS
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; stz DHT_OFFSET
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; lda #7
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; sta DHT_BIT
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;dht_recv:
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; ; start timer
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; lda #DHT_RECV_L
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; sta IO2 + IO_T1CL
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; lda #DHT_RECV_H
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; sta IO2 + IO_T1CH
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; rts
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;dht_recv_read:
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; ; read PA2
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; lda IO2 + IO_RA
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; and #%00000001
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; ldx DHT_BIT
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; beq dht_recv_end
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;dht_recv_rot:
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; rol
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; dex
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; bne dht_recv_rot
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;dht_recv_end:
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; ldy DHT_OFFSET
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; ora DHT_VALUES,y
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; sta DHT_VALUES,y
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; ; determine if 8 bits are done
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; ldx DHT_BIT
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; beq dht_recv_next
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; rts
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;dht_recv_next:
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; lda #7
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; sta DHT_BIT
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; inc DHT_OFFSET
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; cmp DHT_OFF_DONE
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; beq dht_display
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; rts
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;dht_display:
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; ldx #0
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;dht_display_:
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; lda DHT_VALUES,x
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; sta TO_PRINT,x
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; inx
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; cpx #5
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; bne dht_display_
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; jsr lcd_print_clear
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; rts
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;dht_irq:
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; lda DHT_STATUS
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; cmp #DHT_WAIT_REQ
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; beq dht_request_end
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; cmp #DHT_WAIT_RESP
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; beq dht_response
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; cmp #DHT_RECV
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; beq dht_recv
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; rts
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2023-10-26 19:51:20 +02:00
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