6502-OS/spicode.s65

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.include "system.h65"
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.include "string.h65"
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.include "lcd.h65"
.include "math.h65"
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.include "keypad.h65"
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.include "chars.h65"
.import homeloop:absolute
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.import home:absolute
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.segment "SPI"
.export CODE_START
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.import memcopy
.scope kb
KB_IO = IO1
.endscope
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CODE_START:
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.assert * = $5000, error, "SPI Code not at $5000"
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jsr lcd::clear
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lda #'$'
jsr lcd::print_char
; stz kp::_DEBUG_VAL
; @loop:
; lda kp::_DEBUG_VAL
; beq @loop
; stz kp::_DEBUG_VAL
; cmp #'*'
; jeq homeloop
; jsr lcd::print_char
; bra @loop
lda #<kb_irq1
sta ARG0
lda #>kb_irq1
sta ARG1
lda #<$3000
sta ARG2
lda #>$3000
sta ARG3
ldy #20
jsr memcopy
lda #<kb_irq2
sta ARG0
lda #>kb_irq2
sta ARG1
lda #<$3100
sta ARG2
lda #>$3100
sta ARG3
ldy #20
jsr memcopy
lda #'?'
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jsr lcd::print_char
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; PrintNC $3000
jsr kbinit
lda #'%'
jsr lcd::print_char
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stz kp::_DEBUG_VAL
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ldy #0
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@loop:
lda kp::_DEBUG_VAL
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beq @loop
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stz kp::_DEBUG_VAL
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cmp #'*'
jeq homeloop
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cmp #'1'
beq @l1
cmp #'2'
beq @l2
cmp #'3'
beq @l3
cmp #'A'
beq @lA
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cmp #'B'
beq @lB
cmp #'C'
beq @lC
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jsr lcd::print_char
bra @loop
@l1:
; jsr irq_on_shift_reg
jsr $3000
lda #'*'
jsr lcd::print_char
bra @loop
@l2:
; jsr irq_on_timer
jsr $3100
lda #'#'
jsr lcd::print_char
bra @loop
@l3:
lda $3000,y
jsr lcd::print_char
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iny
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bra @loop
@lA:
lda kb::KB_IO + IO::SR
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jsr lcd::print_char
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bra @loop
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@lB:
Strf fmt_str, out_str, keycode
Print out_str
bra @loop
@lC:
jsr lcd::clear
bra @loop
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kbinit:
lda #'['
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jsr lcd::print_char
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; - use the shift register interrupts to read the first 8 bits
; set shift register to shift in under external clock on CB1
; - configure timer for timing the read of the last 3 bits
; timer 2 one shot mode is sufficient, leaves T1 available
lda #(IO::ACR::SR_SIN_PHIE | IO::ACR::T2_IRQ_LOAD)
tsb kb::KB_IO + IO::ACR
; the 3 last bits take about 230us, at @1MHz => wait 230 cycles and then the shift register
lda #230
sta kb::KB_IO + IO::T2CL
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stz key_read
stz key_read+1
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; enable SR interrupts
lda #(IO::IRQ::IRQ | IO::IRQ::SR)
sta kb::KB_IO + IO::IER
; load SR to reset
lda kb::KB_IO + IO::SR
lda #']'
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jsr lcd::print_char
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rts
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;; @details
;; IO::SR has to be read before the next bit is shifted in, which happens ~75us after the irq
;; at 1MHz, handlings this interrupt takes about 50us (without any additional debug code), so it should work
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irq_on_shift_reg:
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; lda #'{'
; jsr lcd::print_char
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lda kb::KB_IO + IO::SR
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sta key_read
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stz kb::KB_IO + IO::SR
; disable SR interrupts
lda #IO::IRQ::SR
sta kb::KB_IO + IO::IER
; enable timer interrupts
lda #(IO::IRQ::IRQ | IO::IRQ::T2)
sta kb::KB_IO + IO::IER
; start timer
lda #1
sta kb::KB_IO + IO::T2CH
; lda #'}'
; jsr lcd::print_char
rts
irq_on_timer:
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; lda #'<'
; jsr lcd::print_char
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lda kb::KB_IO + IO::SR
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sta key_read + 1
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lda kb::KB_IO + IO::T2CL ; clear interrupt flag
; disable timer interrupts
lda #(IO::IRQ::T2)
sta kb::KB_IO + IO::IER
; enable shift register interrupts
lda #(IO::IRQ::IRQ | IO::IRQ::SR)
sta kb::KB_IO + IO::IER
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; reset SR
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stz kb::KB_IO + IO::SR
; lda #'|'
; rotate bit 2 (last bit of keycode) into the carry
ror
ror
ror
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lda key_read ; not affecting carry
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rol ; rotate carry into byte, rotate startbit into carry
; TODO byte is inverted, maybe consider wasting 256 bytes for a bit reverse lookup table?
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sta keycode
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Strf fmt_str2, out_str, keycode, key_read, key_read+1
PrintNC out_str
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stz key_read
stz key_read+1
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rts
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key_read: .res 2
keycode: .res 1
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kb_irq1:
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; lda #'!'
; jsr lcd::print_char
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jsr irq_on_shift_reg
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; lda #':'
; jsr lcd::print_char
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rts
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.byte '='
kb_irq2:
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; lda #'?'
; jsr lcd::print_char
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jsr irq_on_timer
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; lda #';'
; jsr lcd::print_char
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rts
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.byte '@'
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out_str: .res 40
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fmt_str: .asciiz "kc%x;"
fmt_str2: .asciiz "kc%x-%x-%x; "
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